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 == HPC == == HPC ==
-high performance computing. Implies a higher percentage of CPU and memory usage than typical administrative computing. ​ In academia, used for and implies computing for research. Also HTC, high throughput computing, similar but more oriented to processing large data files.+high performance computing. Implies a higher percentage of CPU and memory usage than typical administrative computing, or implies a program too large for, or that takes too long on, a desktop computer.  In academia, used for and implies computing for research. Also HTC, high throughput computing, ​essentially ​similar but oriented to processing large data files.
  
 == node == == node ==
-a computer in a box, similar to a desktop computer but typically more powerful and packaged for rackmount.+single ​computer in a box, functionally ​similar to a desktop computer but typically more powerful and packaged for rackmount ​in a datacenter. Usually two CPU sockets or four sockets with very large memory vs. one socket for a desktop. Implies shared memory for the programs running on the node.
  
 == cluster == == cluster ==
-a group of nodes connected by a network. Depending on budget and need for communication,​ the network may be inexpensive commodity (Gigabit ethernet) or faster and more expensive (Infiniband).+a group of nodes connected by a network. Depending on budget and need for communication,​ the network may be inexpensive commodity (Gigabit ethernet) or faster and more expensive (Infiniband ​or 40Gb Ethernet) or in between (10Gb Ethernet).
  
 == supercomputer == == supercomputer ==
-relatively ​large and powerful cluster. Exact definition uncertain.+a large and powerful cluster. Exact definition uncertain.
  
 == compute node == == compute node ==
-computer ​dedicated to scientific computing tasks. Usually controlled by a scheduler program. Usually isolated from the public internet by head nodes.+cluster node dedicated to scientific computing tasks. Usually controlled by a scheduler program. Usually isolated from the public internet by head nodes.  Usually has a high-speed network for running parallel computing and delivering files over the network.
  
-== head node == +== head or login node == 
-computer ​connected to the public internet and dedicated to logins, editing, moving data, submitting jobs.+cluster node connected to the public internet and dedicated to logins, editing, moving data, submitting jobs
 + 
 +== I/O node == 
 +a cluster node dedicated to delivering networked file systems to a cluster.
  
 == data mover node == == data mover node ==
-computer ​connected to the public internet and dedicated to moving data.+cluster node connected to the public internet and dedicated to moving data to/from external computers.
  
 == CPU/​socket/​core/​thread == == CPU/​socket/​core/​thread ==
-Circa 1980, one computer= one node= one CPU= one socket = one core = one thread. Since then computer design has become more complicated. ​ Typical server computers used for HPC have two to eight sockets (usually two) on a mainboard or motherboard. Each socket holds a CPU "​central processing unit". Each CPU has 1 to 64 cores, each of which  can run an independent program. ​ Intel computers also have 1 or 2 hardware threads or hyperthreads per core, each capable of running an independent program.+Circa 1980, one computer= one node= one CPU= one socket = one core = one processor = usually ​one thread. Since then computer design has become more complicated. ​ Typical server computers used for HPC have two to eight sockets (usually two) on a mainboard or motherboard. Each socket holds a CPU "​central processing unit" ​chip. Each CPU has 1 to 64 cores (or processors), each of which  can run an independent program. ​ Intel computers also have 1 or 2 hardware threads or hyperthreads per core, each capable of running an independent program, but which do not add any more hardware capability to the system.
  
 == GPU == == GPU ==
-a graphical processing unit, a specialized type of CPU derived from a graphics card. Effectively has hundreds of small cores. For certain tasks, much faster than a general-purpose CPU.  Presently available versions must be attached to and be controlled by a program running ​on a CPU.+a graphical processing unit, a specialized type of CPU derived from a graphics card. Effectively has hundreds of small cores. For certain tasks (those that can be effectively parallelized)is much faster than a general-purpose CPU.  Presently available versions ​are "​co-processors"​ that must be attached ​to a PCI bus which is connected ​to and controlled by a CPU.  Also Xeon Phi, a CPU with many small cores which has the software interface of a general purpose CPU, but is used on highly parallel codes like a GPU. Xeon Phi is available either as co-processor or as a CPU.
  
 == shared memory == == shared memory ==
-In software, a program that runs multiple tasks or software threads, each of which sees the same available memory available from the operatin ​system and shares that memory using one of the multiple shared memory communication methods (OpenMP, pthreads, POSIX shm, MPI over shared memory, etc.)  In hardware, usually a node or a single computer system that supports shared memory access across its memory. ​Present-day versions usually implemented as NUMA.  ​Implies a limit to the memory size of the program ​which is determined by presently available hardware.+In software, a program that runs multiple tasks or software threads, each of which sees the same available memory available from the operating ​systemand shares that memory using one of the multiple shared memory/​multi-threading ​communication methods (OpenMP, pthreads, POSIX shm, MPI over shared memory, etc.) Shared memory programs cannot run across multiple nodes. ​In hardware, usually a node or a single computer system that supports shared memory access across its memory. Implies a limit (a little less than the amount of memory in the node) to the memory size of the running ​program. ​
  
-== NUMA ==  +== distributed memory ​== 
-non-uniform ​memory ​access, some CPUs (and their coreshave faster access ​to memory ​that is physically attached ​to them.  Memory that is attached ​to other CPUs is accessed on an internal networkcausing additional latency.+In software, a program or group of programs that run on multiple nodes or shared-memory ​instances and use programs such as MPI to communicate between the nodes. ​ In hardware, a cluster that runs distributed-memory programs. Distributed-memory programs are limited in memory size only by the size of the cluster that runs themthough there may be some useful limit that is smaller. 
 + 
 +== MPI == 
 +message passing interface, software standard used for most programs that use distributed memory. ​ MPI calls lower-level functions, either networking or shared memory, so it may be used transparently over either distributed or shared memory without changing the user interface. ​ On a cluster that means it can run transparently either on one node or multiple nodes. ​ MPI has multiple implementations ​(OpenMPI, MVAPICH, several commercialthat must be used consistently ​to both compile and run an MPI program. ​ Each MPI task is a separate program which can be single-threaded or multi-threaded. 
 + 
 +== single-threaded == 
 +A software program ​that cannot take advantage of multi-threading because it was written without multi-threading support. ​ Essentially can use only one core on one node regardless of the number of cores available. Multiple single-threaded programs can be run on a single node on multiple cores if sufficient memory ​is available. ​  
 + 
 +== memory hierarchy == 
 +A design element used to make fast computers affordable.  Memory ​is arranged in levels with very small and very fast and very expensive levels close to the CPU, and each succeeding level is made larger and slower. Most modern computers have registers (very fast and of KB size), L1 to L3 or L4 cache of MB size, and main memory of GB size, or "​memory"​ if unspecified. ​ The operating system automatically handles staging data from main memory through the cache and registers, unless the programmer uses assembly language to control ​that staging. ​ This process makes sequential access to main memory relatively fast, as large blocks of memory can be staged through the cache while computing ​is ongoing, but random access ​to main memory ​is relatively slow, as the processor can idle for 200 cycles while waiting for a single element of main memory. 
 + 
 +== storage hierarchy == 
 +By analogy with memory hierarchy, the practice of using multiple disk storage systems with an HPC system. Each tier of storage is larger and slower than the preceding tier.  The first "​scratch"​ tier is relatively small and fast for a disk, usually composed of SSD, and does most direct data movement to the compute nodes. The last tier may be tape or large and inexpensive disk drives and holds longer term and larger files. 
 + 
 +== scratch file system == 
 +A temporary file system, designed for speed rather than reliability,​ and the first tier in the storage hierarchy. Usually composed of faster disks, currently SSD. 
 + 
 +== SSD == 
 +Solid state disk, memory chips packaged with an interface that appears to the computer to be a disk drive. Faster than rotating disk drives and still more expensivethough decreasing in price over time.
  
 == latency == == latency ==
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 the amount of data that can be moved over a network per second. the amount of data that can be moved over a network per second.
  
-== distributed memory ​== +== VM or virtual machine ​== 
-In software, ​a program ​or group of programs that run on multiple nodes or shared-memory instances ​and use programs such as MPI to communicate between ​the nodes In hardware, a cluster ​that runs distributed-memory programs. ​Distributed-memory programs are limited ​in memory ​size only by the size of the cluster that runs them.+a program ​running on a node that emulates a computer and connects the host computer'​s resources to the emulated computer. ​ The VM runs an operating system, which runs user programs, like a physical computer. Useful for programs that do not consume a lot of CPU time, and also useful to keep user programs from exceeding memory limits, and providing a way to save the state of a user program. A single powerful computer can run a number of VMs. Also container as in Docker, a form of VM that is less isolated from the host computer than is a full VM. 
 + 
 +== HPC scheduler == 
 +A program that maintains a list of batch jobs to be executed ​on a cluster, ranks them in some priority order, ​and executes batch jobs on compute nodes as they become available. It tries to keep the cluster from being overloaded or idleAlso OS scheduler, a part of the kernel ​that runs on a shared-memory ​node and allows competing user programs ​access to CPU time, and IO scheduler, another part of the kernel that orders multiple disk accesses for a node. 
 + 
 +== parallel program == 
 +A program that is either multi-task (like MPI) or multi-threaded (like OpenMP) or both, in order to effectively use more cores and more nodes and get more computing done. May be either shared-memory ​or distributed-memory. ​ Opposite, a serial program. 
 + 
 +== parallel scaling == 
 +The efficiency of a parallel program, usually defined as the parallel speedup of the program divided ​by the number ​of cores occupied. ​ Speedup is defined as the serial run time divided by the parallel run time.  Usually parallel computing introduces overhead, and scaling is less than 1 or 100%. Rarely, running on multiple CPUs can make each task fit within the memory cache of each CPU, avoiding waiting for main memory access, and scaling can exceed 1. In most cases, scaling starts at 1 at 1 core (by definition) and decreases as more cores are added, until some point is reached at which adding more cores adds overhead and makes the program slower.
  
-== memory heirarchy == 
-A design element used to make fast computers affordable. ​ Memory is arranged in levels with very small and very fast and very expensive levels close to the CPU, and each succeeding level is larger and slower. Most modern computers have registers (very fast and of KB size), L1 to L3 or L4 cache of MB size, and main memory of GB size, or "​memory"​ if unspecified. ​ The operating system automatically handles staging data from main memory through the cache and registers, unless the programmer uses assemble language to control that staging. 
jargon.1470346467.txt.gz · Last modified: 2016/08/04 21:34 by root